| Xelerated Unveils the X11 Network Processor | |||
| Posted by: Jordi on Wednesday, October 22, 2003 - 10:22 AM | |||
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Xelerated Second Generation NPU Sets a New Standard for Performance and Integration for Midrange Enterprise and Low End Metro Ethernet Designs. | ||
| In the X11 data flow pipeline each packet passes through 360 PISC(TM) processors, raising the performance standard established by the X10q by 80%. Integrated 10 Gbps MACs with programmable XAUI interfaces allow direct connection to enterprise switch fabrics and Ethernet transceivers. Integrated algorithmic search co-processors allow direct connection of high performance DRAM without consuming additional processing resources. Table search bandwidth has been increased to 110 Gbps to support high functionality applications, including advanced IPv6, while using inexpensive DRAM. Xelerated will disclose the architectural details of the X11 at the Network Processor Conference in San Jose on October 23, 2003.
"The availability of high performance, low cost, programmable architectures such as the X11, will facilitate graceful integration of IPv6 into the enterprise, catering for swift response to changes as networks gradually integrate IPv6 into the current IPv4-based networks," states Latif Ladid, President, IPv6 Forum and Chair European Union IPv6 Task Force. For the complete info click here. |
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